Participants Info
| Name | Tung Chou, Ruben Niederhagen, Bo-Yin Yang |
|---|---|
| Institute | Eindhoven University of Technology, the Netherlands; Academia Sinca, Taipei, Taiwan |
Submission Details
| Date | 2015/05/20 |
|---|---|
| Type | IV |
| Number of variables (n) | 91 |
| Number of equations (m) | 61 |
| Seed (0,1,2,3,4) | 0 |
| Algorithm | Gray Code enumeration |
| Hardware | Rivyera, 128 Spartan 6 FPGAs |
| Running Time | 18548.91 seconds |
| Answer v=[v1,…,vn] in Fn | [1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 1, 1, 0, 1, 1, 0, 1, 1, 0, 1, 1, 1, 1, 0, 0, 1, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0] |
| Notes |